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GaAs MMIC
CMY 210
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Preliminary Data
* Ultralinear Mixer with integrated LO-Buffer * Very high Input-IP3 of typical 25dBm * Very low LO-Power demand of typ. 0dBm * Suited for Up- and Down-Conversion * Wide LO-Frequency Range <500MHz to >2,5GHz * Wide LO-Level Range * Single ended Ports * RF- and IF-Port Impedance 50 Ohm * Operating Voltage Range: < 3 to 6V * Very low Current Consumption of typical 7mA * All Gold Metallisation ESD: Electrostatic discharge sensitive device
Observe handling Precautions!
RF or IF GND LO in 3 2 1
6 5 4 V DD GND IF or RF
Type
Marking
Ordering code (tape and reel)
Package 1)
CMY210
M3
Q62702 M 0016
MW-6
Maximum Ratings Supply Voltage DC-Voltage at LO Input DC-Voltage at RF-IF Ports Power into RF-IF Ports Power into LO Input Channel Temperature Storage Temperature
2)
Port 4 3 1, 6 1, 6 3
Symbol min VDD V3 V1,6 Pin,RF Pin,LO TCh Tstg -55 0 -3 - 0,5
Value max 6 0,5 + 0,5 10 10 150 150
Unit V V V dBm dBm C C
Thermal Resistance Channel to Soldering Point (GND)
RthChS
100
K/W
1) For detailed dimensions see chapter Package Outlines 2) For DC test purposes only, no DC voltages at pins 1, 6 in application Siemens Aktiengesellschaft pg. 1/6 11.01.1996 HL EH PD 21
GaAs MMIC
Electrical Characteristics
CMY 210
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Test conditions: Ta = 25C; VDD= 3V, see test circuit; fRF = 1620MHz; fLO = 1500MHz; PLO = 0dBm; fIF = 120MHz, unless otherwise specified: Parameter, Test Conditions Operating Current Conversion Loss SSB Noise Figure 2 Tone 3rd Order IMD PRF1 = PRF2 = -3dBm fRF1 = 1615MHz; fRF2 = 1620MHz; fLO =1500MHz 3rd Order Input Intercept Point P-1dB Input Power LO Leakage at RF/IF-Port (1,6) Test circuit / application example
Notes for external elements:
L2 in/ out RF/ IF 50 Ohm L1 C1 out/ in IF/ RF 50 Ohm C2 1 6
Symbol Iop Lc Fssb dIM3
min -
typ 7 5,5 5,5 56
max -
Unit mA dB dB dBc
IP3in P-1dB P LO 1,6
-
25 20 -6
-
dBm dBm dBm
CMY210s
LOin (50 Ohm) 3 C3 L3
4 C5
2,5
L4 C4 Vdd
L1, C1: Filter for upper frequency; C2, L2: Filter for lower frequency; each filter is a throughpath for the desired frequency (RF or IF) and isolates the other frequency (IF or RF) and its harmonics. These two filters must be connected to pin 1 and pin 6 directly. Parasitic capacitances at the ports 1 and 6 must be as small as possible. L4 and C5 are optimized by indicating lowest Iop at used LOfrequency; same procedure for L3. The ports 1, 3 and 6 must be DC open. C3 pF 47 33 18 15 15 3) L4 nH 19 16 8.5 *) *) 2) C4 pF 47 33 18 15 15 2) C5 pF 3.3 0 0 0 0 2) 11.01.1996 HL EH PD 21
f LO MHz 500 1000 1500 2000 2500 notes next pg
L1 nH 11 7 4 *) *) 1)
C1 pF 8.2 4.7 2.2 2.2 2.2 1)
L2 nH 19 9 7,5 *) *) 1)
C2 pF 4.7 3.3 2.2 1.5 1.5 1)
L3 nH 6 6 6 4 3 3) pg. 2/6
Siemens Aktiengesellschaft
GaAs MMIC
CMY 210
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Approximate values of used elements for down- (or up-) conversion with a lower frequency of 10MHz to 120MHz (IF or RF; in or out); parasitics will cause deviations; therefore exact values will be defined by application, especially for *).
General description and notes:
The CMY 210 is an all port single ended general purpose Up- and Down-Converter. It combines small conversion losses and excellent intermodulation characteristics with a low demand of LO- and DC-power. The internal level controlled LO-Buffer enables a good performance over a wide LO level range. The internal mixers principle with one port RF and IF requires a frequency separation at pin 1 and 6 respectively. Note 1: Best performance with lowest conversion loss is achieved when each circuit or device for the frequency separation meets the following requirements: Input Filter: Throughpass for the signal to be mixed; reflection of the mixed signal and the harmonics of both. Output Filter: Throughpass for the mixed signal and reflection of the signal to be mixed and the harmonics of both. The impedance for the reflecting frequency range of each filter toward the ports 1 and 6 should be as high as possible. In the simplest case a series- and a parallel- resonator circuit will meet these requirements but also others as appropriate drop in filters or micro stripline elements can be used. The two branches with filters should meet immediately at the package leads of the port 1 and 6. Parasitic capacitances at these ports must be kept as small as possible. The mixer also can be driven with a source- and a load impedance different to 50, but performance will degrade at larger deviations. Note 2: The LO-Buffer needs an external inductor L4 at port 4; the value of inductance depends on the LO frequency. It is tuned for minimum Iop consumption into port 4. At lower LO frequencies it can be reduced by an additonal capacitor C5. Note 3: The LO Input impedance at Port 3 can be matched with a series inductor. It also can be tuned for a minimum current Iop into port 4. C3 is a DC blocking capacitor. Since the input impedance of port 3 can be slightly negative at lower frequencies, the source reflection coefficient should be kept below 0.8 ( Z0 = 50 ) within this frequency range. The Conversion Noise Figure Fssb is corresponding with the value of Conversion Loss Lc. The LO signal must be clean of noise and spurious at the frequencies fLO f IF.
Siemens Aktiengesellschaft
pg. 3/6
11.01.1996 HL EH PD 21
GaAs MMIC
Operating Current Iop = f (PLO) VDD = 3V fLO = Parameter
20 10
CMY 210
Conversion Loss Lc = f (PLO) VDD = 3V; fIF = 120MHz fLO = Parameter
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Iop
18 16 mA 14 12 10 8 6 4 2 0 -10 -8 -6 -4 -2 0 2 dBm 4 6 8 10 2.5GHz 2.0 1.5 1.0 0.5
Lc
9 8 dB 7 2.5GHz 6 5 4 3 2 1 0 -10 -8 -6 -4 -2 0 2 dBm 4 6 8 10 2.0 1.5
PLO
PLO
Conversion Loss Lc = f (VDD) PLO = 0dBm fLO = 1500MHz; fIF = 120MHz
10 40
Third Order IP3 IP3in = f (PLO) Pin = 2 x -3dBm; fIF = 40/45MHz VDD = 3V; fLO = Parameter;
IP3in
Lc
9 8 dB 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 V 7 8 9 10
30 dBm 25 0,5 1,5 2,0 15 2.5GHz
20
10 -10 -8 -6 -4 -2 0 2 dBm 4 6 8 10
VDD
PLO
Siemens Aktiengesellschaft
pg. 4/6
11.01.1996 HL EH PD 21
GaAs MMIC
Operating Current Iop = f (VDD) PLO = 0dBm fLO = 1500MHz
20 0
CMY 210
LO-Leakage at Port 1, 6 PLO1,6 = f (fLO) PLO = 0dBm VDD = 3V
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Iop
18 16 mA 14 12 10 8 6 4 2 0 0 1 2 3 4 5 6 V 7 8 9 10
PLO1,6
-2 -4 dBm -6 -8 -10 -12 -14 -16 -18 -20 0 0.5 1.0 1.5 GHz 2.0 2.5
VDD
fLO
Siemens Aktiengesellschaft
pg. 5/6
11.01.1996 HL EH PD 21
GaAs MMIC
Additional informations and an example of a general purpose mixer pcb:
CMY 210
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This general purpuse mixer demonstration board is used to show the performance of the CMY 210. The hints below will be helpful to achieve good intermodulation behaviour. Material: Epoxy; size 24mm x 30mm; thickness 1mm A good ground connection for CMY210 is necessary; here it is realized by 3 vias under the CMY 210 device. Best IM3 performance is obtained, when the capacitor C4 is grounded at the upper CMY 210 ground line without any additional vias (so the RF-Signal is encoupled from the LO-buffer best possible). Frequency tuning is done by selecting suitable capacitors C1 and C2, positioning C1 along the L1-line and by reducing the inductance of L2 and L4 by a bridge; unnecessary lines should be disconnected.
This example showes an up-converter. The IM3 performance of upconverters mostly can be improved by tuning L4 slightly smaller then required for a minimum current consumption. In other words, the resonant frequency of the buffer circuit at PIN4 (internal capacitor and L4) is tuned by L4 to a frequency slightly above the L.O.-frequency.
This example showes a down-converter. Here an improved IM3-performance mostly can be obtained by a more capacitive load at CMY 210 port pin 4. Here it is realized by a broader part of the L4 inductor line toward to port 4 and tuning L4 to a value sligthly smaller then for a minimum current consumption into port 4. In other words, the resonant frequency of the buffer circuit at PIN4 (internal capacitor and L4) is tuned by L4 to a frequency slightly above the L.O.-frequency.
Siemens Aktiengesellschaft
pg. 6/6
11.01.1996 HL EH PD 21

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